As a result of the improvement in chip process, design scale and performance/power ratio expectation, physical design for digital chips have huge challenges on high frequency, low power, multiple application modes etc. Effective and high quality implementation of building chips is the guarantee of the company’s competitiveness.

As an ASIC-PD engineer at NVIDIA, you'll be responsible for the stage from RTL frozen to tape out, include synthesis, formal verification, constraints definition, timing closure/sign off, study on the timing impact of process and related methodology work. You will face the biggest challenge based on the most advanced processes on building chips in the world.

RESPONSIBILITIES：

Chip integration and netlist generation

Synthesis

RTL/netlist quality check

Formal Verification

Constraints creation and validation, timing budget.

Work with ASIC team to analyze/resolve special timing issues.

Co-work with PR engineers to implement chip partition and floorplan

Work in conjunction with RR engineers to achieve timing closure for both partition and full chip level

Achieve special mode timing closure, such as io, test, clock etc.

Function eco creation

Develop and enhance entire timing closure flow from frontend (pre-layout) to backend (post-layout)

Flow automation development for above areas

Methodology in any of above areas.
MINIMUM REQUIREMENTS：

BSEE, MSEE is preferred

Project experience in IC design implementation

Courses taken in circuit design, digital design

Hand-on experience in EDA software from Synopsys (DC/PT/Formality), Cadence (RC compiler/LEC) is preferred

Proficient user of Perl or TCL is preferred

Excellent English communication skill

NVIDIA is searching for world-class software talent for an exciting role on our CUDA high-performance and scientific computing software team. The successful candidate will work with the most advanced parallel computing technology, and help improve the performance and developer experience as well as determine trends and features for next-generation architectures. You will interact closely with the architecture and other software teams at NVIDIA to ensure the best possible performance and results.

REQUIREMENTS：

Excellent knowledge of C/C++ and programming techniques

Strong mathematical fundamentals, ideally numerical methods, linear algebra, and FFT algorithms

B.S. or higher degree in Computer Science/Engineering or mathematical field

A strong team player that is self-motivated

Great communication skills

Good written and spoken English skills
Plusses：

Knowledge of computer system architectures

Experience with parallel programming, ideally CUDA C/C++ or OpenCL

Experience with performance projections and tuning

Experience in benchmarking

The candidate will participate in the Android-based software development for NVIDIA's new Tegra platforms including but not limited to Android based devices drivers, multimedia, frameworks, kernel and performance/power optimization.

You will have the opportunity to seamlessly work with HQ for cutting edge technologies, and also have opportunity and flexibility to create new innovations.

RESPONSIBILITIES：
- Design and implement software in an embedded software environment.
- New technology research and system architecture design.
- Work with hardware architects on the design of embedded products, providing feedback and guidance on CPU, bus, and device design to ensure that it can be supported well by software.
REQUIREMENTS：
- BS or MS degree in EE/CS/CE
- Excellent C programming and debugging skills.
- Ability for strong problem solving and logical analysis skills.
- Ability for good English reading and writing.
- Good knowledge of operation system (esp. Android, Linux) is a major plus.
- Good knowledge of communication technology (LTE, WCDMA etc) is a plus.

The candidate will participate in the Android-based software development for NVIDIA's new Tegra platforms including but not limited to Android based devices drivers, multimedia, frameworks, kernel and performance/power optimization.

You will have the opportunity to seamlessly work with HQ for cutting edge technologies, and also have opportunity and flexibility to create new innovations.

RESPONSIBILITIES：
- Design and implement software in an embedded software environment.
- New technology research and system architecture design.
- Work with hardware architects on the design of embedded products, providing feedback and guidance on CPU, bus, and device design to ensure that it can be supported well by software.
REQUIREMENTS：
- BS or MS degree in EE/CS/CE
- Excellent C programming and debugging skills.
- Ability for strong problem solving and logical analysis skills.
- Ability for good English reading and writing.
- Good knowledge of operation system (esp. Android, Linux) is a major plus.
- Good knowledge of communication technology (LTE, WCDMA etc) is a plus.

The candidate will participate in the Android-based software development for NVIDIA's new Tegra platforms including but not limited to Android based devices drivers, multimedia, frameworks, kernel and performance/power optimization.

You will have the opportunity to seamlessly work with HQ for cutting edge technologies, and also have opportunity and flexibility to create new innovations.

RESPONSIBILITIES：
- Design and implement software in an embedded software environment.
- New technology research and system architecture design.
- Work with hardware architects on the design of embedded products, providing feedback and guidance on CPU, bus, and device design to ensure that it can be supported well by software.
REQUIREMENTS：
- BS or MS degree in EE/CS/CE
- Excellent C programming and debugging skills.
- Ability for strong problem solving and logical analysis skills.
- Ability for good English reading and writing.
- Good knowledge of operation system (esp. Android, Linux) is a major plus.
- Good knowledge of communication technology (LTE, WCDMA etc) is a plus.

RESPONSIBILITIES：

ASIC design for next generation of multimedia processors.

Micro architecture definition and specification documentation.

RTL design, verification, emulation, synthesis, timing, and silicon bring-up
REQUIREMENTS：

Strong ASIC design skills

Digital simulation and verification skills

Synthesis and static/dynamic timing analysis skills

Experience with image/video signal processing is a plus

Perl/Python script development skills is a plus

Strong teamwork and communication is required

BS in EE/CS, MS preferred

RESPONSIBILITIES：

Verification of multimedia processors

Develop test plan for IP and SOC level verification.

Utilize advanced methodology to validate/verify digital design

Build verification environment, coding verification model, and debug.
REQUIREMENTS：

Strong skills of Verilog, System Verilog and Object Oriented Languages

Building up and managing UVM/OVM test benches

ASIC verification experience is essential

Perl/Python script development skills is a plus

Experience in assertion/random based verification is a plus

Strong teamwork and communication is required

BS in EE/CS, MS preferred

Description/Qualifications:

To spearhead its breakthroughs in High Performance Computing, NVIDIA is looking for a passionate, world-class Software Engineer to work in its Developer Technology Team. In this role, you will open up new domains of application for GPUs by researching and developing GPU computing algorithms, driving their adoption with key application developers and ensuring best possible performance of GPU computing applications on current and next-generation architectures.

Application domains include geosciences, life sciences, computer-aided engineering, computational fluid dynamics, computational chemistry, computational physics, computational finance, electronic design automation, data mining, medical imaging, and many more.

RESPONSIBILITIES：
- Work directly with key US developers on their scientific applications, educating them on the latest NVIDIA technologies.
- Closely collaborate with the architecture and software teams at NVIDIA to influence the design of next-generation architectures.
- Some travel to conferences and for on-site visits with developers will be required.
MINIMUM REQUIREMENTS：
- A good degree from a leading university in an engineering or computer science related discipline.
- Strong knowledge of programming languages such as Fortran and C/C++.
- Strong knowledge of programming techniques and algorithms.
- Strong mathematical fundamentals, including linear algebra and numerical methods.
- Experience with parallel programming, especially data-parallel using MPI, OpenMP, OpenACC or CUDA C/C++/Fortran.
- Good communication and organization skills, with a logical approach to problem solving, good time management and task prioritization skills.

With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology world?s most desirable employers. We have some of the most brilliant and talented people on the planet working for us and, due to unprecedented and ongoing growth, our world-class engineering teams are expanding fast. If you're a creative and autonomous Software Engineer with a genuine passion for parallel computing, we want to hear from you.

Job Description/Qualifications：

The successful candidates will fully engage in all the NVIDIA GPU/TEGRA platforms and products PCB design development together with global designers. This job is taking the responsibility to transfer schematic net-list design, ID and ME design into the physical PCB design basing on electrical guidance, signal integrity, power integrity, ID and mechanical integrity, EMC and safety, manufacturing industry spec and end-user usability requirement. And we have a lot of trainings and researching plans to guide the successful candidates to be the experts of PCB design and related areas.

MINIMUM REQUIREMENTS：
- Bachelor or Master Degree in Electronics Engineering or big interest guys from others majors
- Strong knowledge on the circuit theory
- Good knowledge on the DC-DC power design
- Good knowledge on the signal integrity theory
- Good knowledge on the power integrity theory
- Good knowledge on the EMC, EMI and Safety techniques
- Good knowledge on PCB fabrication and assembly process
- Good knowledge on PC architecture and mobile devices architecture
- Familiar with one PCB design software is must, experience of real project PCB design is preferred
- Familiar with SI/PI simulation tools is preferred, such as Sigrity, ADS, HFSS and etc.
- C is must, C++ and JAVA are preferred
- Can do attitude, good team worker
- High energy, Ability to learn complex process and concept in a fast pace environment
- Quick thinking, good decision making skills and problem solving skills
- Self-motivated, patient, desire to take challenges.
- Good communication skills (Written and oral)
- Level 4 or 6 English
      职位名称：PCB设计工程师
      地点：深圳
      工作描述/条件：
      成功的应征者将和全球的设计师一起，全面参与所有的NVIDIA GPU / TEGRA平台以及产品的PCB设计开发。这项工作主要责任有：基于电路设计规范，信号完整性和电源完整性要求，工业和机构设计需求，电磁兼容要求，同时满足制造行业规范和最终用户可用性的需求将设计原理图网表转换为PCB物理设计。公司有众多相关的培训和学习计划，以指导入围应聘人最后能成为PCB设计和相关领域的专家。
      最低要求：
      电子工程专业学士，硕士学历；非电子专业的高度感兴趣人士。
      优秀的电路理论知识
      良好的DC-DC电源设计技能
      良好的信号完整性理论知识
      良好的电源完整性理论知识
      良好的电磁兼容，电磁干扰以及安全技术
      良好的PCB生产和组装流程知识
      良好的 个人电脑以及移动设备架构知识
      至少熟悉一种PCB设计工具，有实际PCB项目设计经验者优先
      熟悉信号完整性/电源完整性仿真工具者优先， 如Sigrity, ADS, HFSS 等
      至少掌握C语言
      良好的团队精神
      充满活力，适应快速变化和综合观念环境下学习
      具备快速思考，优秀的解决问题和决策能力
      能自我激发，坚韧不拔，勇于挑战自我
      具备良好的英语沟通技能（书面和口语）
      通过英语四级或六级

Power methodology/analysis team is responsible for researching power expenditures and workload efficiency to identify architectural, micro-architectural strategies to improve power efficiency of the next generation GPU and TEGRA chips.

Responsibilities：

Develop the power flow to automate the power expenditures measurement.

Evaluate new low-power technologies and improve chip power efficiency on architectural level.

Support GPU/TEGRA RTL designers using the power flow and improve their power efficiency on micro-arch level.

Understand and perform block level and chip-level power analysis.
Requirements：

MSEE/MSCS with experience on ASIC related areas.

Familiar with advanced low power techniques and high speed clocking desired.

Experience in low power ASIC design/verification.

RESPONSIBILITIES：
1. Responsible for supplier technical support and management, control the NPI material technical and quality of the mechanical parts/components of Mobile devices system (tablet, smartphone) or gaming device (console) based on product specifications.
2. Work with Ensure suppliers comply with the cosmetic spec completely and accurately.
3. Perform survey and audit for new supplier qualification and selection.
4. Work with global mechanical designer to perform parts DFM review so to ensure the manufacturability.
5. Work with MQE team train component suppliers and CEM partner IQC team understands NV quality specifications/criteria exactly so to let all partners use same criteria for inspection.
6. Host regular NPI review meeting with material supplier, NVIDIA global function team, and CEM partner and address the open items.
7. Support tool trail and review the issues, and also address the corrective actions with suppliers and designer.
8. Work with supplier to submit qualification report of material and submit it in system.
9. Engage on improving the yield and efficiency with supplier so for capacity ramping up.
REQUIREMENTS：
1. MSME (Master of Science in Mechanical Engineering) or equivalent.
2. Independent individual with strong teamwork spirit in the environment of cross-function organizations.
3. Strong performance-oriented spirit and excellent coordinating & organizing abilities.
4. Righteous and self-driving characters are needed, enterprising and highly-motivated characters are preferred.
5. Technical or quality sensitive and effective problem-solver through teamwork and analytical ability.
6. Detail oriented, and enjoys increasing abilities by dropping him/herself into some basic trivial activities or practices.
7. Flexible to domestic travel.
8. Good in written and oral communication in English

Job Description/Qualifications：

Job Description:

- Automation development on various operating systems and Nvidia GPUs
- Work closely and collaboratively with other development and QA teams to gather automation requirements and review automation design.
MINIMUM REQUIREMENTS：
- Bachelor or Master Degree in Electronics Engineering or big interest guys from others majors
- Strong knowledge on the circuit theory
- Good knowledge on the DC-DC power design
- Good knowledge on the signal integrity theory
- Good knowledge on the power integrity theory
- Good knowledge on the EMC, EMI and Safety techniques
- Good knowledge on PCB fabrication and assembly process
- Good knowledge on PC architecture and mobile devices architecture
- Familiar with one PCB design software is must, experience of real project PCB design is preferred
- Familiar with SI/PI simulation tools is preferred, such as Sigrity, ADS, HFSS and etc.
- C is must, C++ and JAVA are preferred
- Can do attitude, good team worker
- High energy, Ability to learn complex process and concept in a fast pace environment
- Quick thinking, good decision making skills and problem solving skills
- Self-motivated, patient, desire to take challenges.
- Good communication skills (Written and oral)
- Level 4 or 6 English

Responsibilities：
- We are looking for world class engineers to design, model, analyze and verify next generations of GPU architecture.
- The candidates will work with a group of architects to design and develop proprietary internal tools for the visualization, analysis, and debug and verification of tests and applications on various functional and performance simulations of future chips.
- The candidates will have opportunities to get involved in cutting-edge GPU macro- and micro-architecture design, verification and optimization, including porting commercial applications to test benches, identifying performance hotspots and data mining for performance analysis.
Requirements：
- Bachelor’s Degree or higher majoring in CS/EE/Mathematics or relevant fields
- Strong C/C++ programming ability. Scripting language (Perl, Python, Ruby) experience is a plus.
- Strong problem solving capability, analytical and communication skills.
- Proactive, creative and a team player.
- Excellent English writing for engineering documentation, English oral well enough to attend meetings.
- Experience in the following areas is a plus:
- Microprocessor architecture design & verification.
- 3D graphics (D3D or OpenGL) application development.
- Multimedia (video, image processing, visualization) application development
- System level programming experience in OS, compiler, driver, tools, virtual memory system, etc.
- Parallel computing/CUDA/OpenCL/HPC development.

RESPONSIBILITIES：

Hardware Design for Graphics card, Automotive and game console

Board/System level circuit research and Development

Schematic concept design, Component selection and Bill of Material generation

Board/system level Hardware debug and verification

Responsible for product design issue in overall lifecycle

Guide PCB layout engineer for placement, power and high speed signals routing

Guide design Validation engineer for signal measurement

DC/DC Power design, debugging and measurement

Co-work with chip solution team for chip level bring up

Co-work with BIOS & driver engineer on debug and FA

Co-work with core SW team on Tablet and smartphone debug -Co-working with SI/EMC engineer for signal quality and EMC issue

Co-work with mechanical engineer for system stackup
MINIMUM REQUIREMENTS：

BS/MSEE

Know high speed signal theory

Successful Candidate will possess the following traits:

Can do attitude

High energy

Leadership

Ability to learn complex concepts in a fast pace environment

Strong desire on creativity

Quick thinking and good decision making skills

Good communication skills (written and oral)
      职位名称：硬件设计工程师
      工作职责:
      - 汽车电子,平板电脑,游戏机和电脑显卡等硬件设计.
      - 板卡或系统级硬件电子电路的开发与研究.
      - 原理图设计,元器件选择,创建生产材料清单.
      - 与机构工程师一起进行结构设计
      - 板卡或系统级硬件电子电路的调试和验证.
      - 负责解决在整个产品生命周期内的设计问题.
      - 指导PCB设计工程师进行PCB布局设计以及电源和高速信号布线.
      - 指导测试工程师作信号测量和功能验证,并分析测试结果.
      - DC-DC电源设计, 调试和验证.
      - 与芯片设计团队合作,调试新芯片.
      - 与软件（驱动软件，系统调试软件，操作系统）工程师合作, 分析解决问题.
      - 与SI/EMC/RF团队合作进行信号和电源的完整性分析, 电磁兼容性以及射频设计
      职位要求:
      - 大学本科/研究生. 电子,电气工程,计算机技术,信息工程或相关专业.
      如有以下经验，可获得额外加分
      - 了解高速信号设计
      - 了解安卓操作系统内部架构
      - 了解I2C, SPI, PCIE, HDMI, DP, DSI/CSI等接口的工业规范
      - 了解DC-DC的电源设计
      - 熟悉设计工具 (OrCAD, Concept, Allegro 等)
      成功应试者应具备的个人品质
      - 领导能力
      - 快速学习能力
      - 创新欲望
      - 积极肯干
      - 临场应变和决策能力
      - 有良好的书面，口头英文能力

The NVIDIA Architecture group is looking for a web applications software engineer to develop the user interface and front end application for comprehensive workflows for the development of new graphics chips. This software development team is a fast-paced agile software team with extremely high production quality standards producing tools used by engineering across the company for tracking and debugging operational and development issues.

In this position, you will, in your ownership of full tool development and release life-cycle, drive the UI design, database interaction, development, testing, and deployment. You will evaluate technology alternatives, work closely with other project members and customers to specify the system, create schedules, and manage ongoing feedback and enhancement releases. You will learn and greatly improve the daily workflows of the world’s top chip modelers and designers.

MINIMUM REQUIREMENTS：
- Strong object-oriented programming background required: Java is strongly preferred
- Experience in developing web-based user interfaces and applications
- Experience with javascript & css & html
- Experience with databases required, MySQL or Postgress preferred, experience with NoSQL databases a plus
- Strong dynamic language skills desired – perl,ruby preferred
- MS (preferred) or BS in Computer Science with at least 3 years of experience
- Excellent communication skills
- Flexibility/adaptability for working in a dynamic environment with evolving frameworks and requirements

      The NVIDIA Architecture group is looking for world class programmers to develop the core infrastructure for modeling, analysis, and debugging in the development of large scale general purpose Graphics+Computing chips. This C++ infrastructure enables our driver stack, applications, tests and studies to all run unchanged on all functional, diagnostic, and performance models, simulations, emulations and silicon for all of our graphics chips.
      A key part of NVIDIA’s strength is our proprietary internal tools for the visualization, analysis, and debug and verification of tests and applications on various functional and performance simulations of future chips. We are continuously pushing the envelope and needing the next generation of tools to enable the next generation of chips. These tools are used by hundreds of engineers worldwide.
      In this role you will play a critical part in every stage of development of a graphics chip. You will work closely with other project members and users to specify systems, create schedules, and manage ongoing feedback and enhancement releases. You will learn and greatly improve the daily workflows of the world’s top chip modelers and designers.
MINIMUM REQUIREMENTS:
- Strong C++ programming capability required (experience with STL and/or boost a plus)
- Graphics or CUDA knowledge a plus
- Experience with OpenGL, Direct3D, CUDA APIs a plus
- Knowledge of next generation Graphics API’s(DX12/Vulkan) is a big plus
- Experience with chip and/or system simulation a big plus
- Strong scripting skills desired – Python/Perl preferred