| Shanghai(Zhang Jiang) Innovation Center |
Title: Embedded Software Development Engineer
Location: Shanghai |
Scope of Responsibilities:
Develop SW in Freescale i.MX series application processor (ARM-9, ARM-11, ARM-12 based). Assignment will include but not limit to
- WinCE or Linux based BS development
- Audio/video/image codec development
- Multimedia middleware development
- Application development and etc
Develop SW test framework or automation tool. Assignment will include but not limit to
- WinCE BSP test case development and maintenance
- Linux BSP test case development and maintenance
- Multimedia test framework development and maintenance
- Codec automation test framework development and maintenance
Application engineering
- Interface with customer to do requirement collection and analyzing
- Issue/bug diagnostic
- Issue/bug fixing
- SW build and release management
Specific Knowledge/Skills:
·Preferred Degree: Master or above
·Preferred Major: Electronic Engineering, Computer Science, Automation, Application physics, Application mathematics and etc
·Preferred English level: CETS-6 as mandatory
·Preferred Project Experience:
- Linux background project experience
- WinCE background project experience
- Other embedded project experience
- SW test or tool development
- ARM based processor experience
Audio/video/image codec experience |
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| Suzhou Design Center |
Title: IC Front-end Engineer
Location: Suzhou |
Scope of Responsibilities:
·Responsible for IC digital designs by high level languages (e.g. Verilog/VHDL, C) with the followings:
·IP/Module development by Verilog coding and C modeling where necessary, doing simulations, synthesis, create module block guide and module/chip level verifications.
·Digital IC designs primarily focused on MCU products, play partial or full role in SOC design area includes RTL code using Verilog HDL, functional verification, synthesis, DFT, ATPG, formal verification, Power analysis, clock & reset strategy, top-level integration and timing closure.
·New design methodology exploring for both SOC projects and IPs.
·Work closely with product engineer to do test patterns generation/conversion/debugging and deliver final test patterns to product engineer.
·Participate in the system architecture definition and work as a global team to do complex SOC design based on embedded MCU
Specific Knowledge/Skills:
·Master and PhD Degree in Electronic, Communication and Microelectronics Engineering.
·Good English reading, writing, good verbal English is preferred
·Relevant project experience in digital designs based on high-level languages, either in ASIC or FPGA, with basic knowledge of digital design flow, including coding, simulation, synthesis, DFT, STA, test.
·Relevant experience in the area of embedded processors, MCU is a big plus.
·Familiar with main EDA tools, such Synopsys, Cadence and Mentor. Good grasp of Verilog/VHDL, C/C++ and Perl/TCL scripts in Linux/Unix environment.
·Strong teamwork sense, good communication skills and strong self-motivation is required |
Title: IC Backend Design Engineer
Location: Suzhou |
Scope of Responsibilities:
·Responsible for physical synthesis, clock tree synthesis, STA and final timing closure.
·Also as a layout engineer, he/she will be responsible for floorplan generation, power planning, P&R, DRC/LVS and final GDS tape out.
·Also need to attack signal integrity issues (IR drop, cross-talk) under deep submicron process.
·Design for manufacture analysis and optimization
Specific Knowledge/Skills:
·BS/higher Degree in Electronic, Communication and Microelectronics Engineering.
·Good English reading, writing, good verbal English is preferred
·Relevant project experience in IC designs, with basic knowledge of digital design flow, including synthesis, STA and physical implementation.
·Good knowledge/background in the MCU is a big plus.
·Relevant experience in the area of embedded processors, MCU is a big plus.
·Familiar with main EDA tools, Cadence and Mentor. Good grasp of Verilog/VHDL, C/C++ and Perl/TCL scripts in Linux/Unix environment. |
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| Tianjin FSQX IC Design Center |
Title: SoC CAD Layout Engineer
Location: Tianjin |
Scope of Responsibilities:
Perform backend work, including but not limited to Floorplan, Clock Tree Synthesis, Placement, Route, Extraction, Signal Integrity, IR drop, Timing, optimization, Static Timing Analysis, Design For Manufacturing, Physical verification.
Specific Knowledge/Skills:
·M.S. degree in Electrical Engineering or equivalent.
·Good command of English both in writing and speaking, CET4
·Backend hands on experience and flow understanding.
·Fast learner, good team player, willing to work with others |
Title: IC Design Verification Engineer
Location: Tianjin |
Scope of Responsibilities:
·Contributes to project verification plan development for SOC end to end testing following IP integration.
·Contributes to verification testbench design and implementation for Verilog and System Verilog solutions.
·Expands upon a coverage driven constrained random test suite development methodology.
·Extensive test development, debug and coverage analysis to identify all design defects.
·Heavily involved or leading functional and gate simulation efforts using Cadence and Synopsys tools.
·May perform other duties in areas of digital design, synthesis and timing analysis as individual skills enable contributions in these areas.
Specific Knowledge/Skills:
·Bachelor or above in Electronic, Communications, Microelectronics Engineering and Computer Science
·Must be able to communicate in both written and spoken English, CET4
·Experience in digital design based on high-level languages, with knowledge of IC design flow, including coding, simulation, verification, synthesis, DFT and STA
·Good communication skills and the ability to work well as a team
·Knowledge in Verilog, testbench architecture, verification flow
·Knowledge of formal verification is a bonus
·Familiar with mainstream EDA tools from Synopsis, Cadence and Mentor, like NC-Verilog, VCS, DC/PC, RC, PrimeTime, Fastscan and so on
·Languages: Verilog, C/C++, System Verilog, Perl/TCL, UNIX scripting |
Title: EMC Lab PCB Board Design Engineer(FSQX)
Location: Tianjin |
Job Description:
Create EMC test board,validation board,and necessary daughter cards. Responsibilities will include the PCB schematic design,creation of component symbols and footprints, mechanical evaluation,component placement,signal routing,library maintenance and documentation. In addition to these core tasks,this position will also require the
following: performing validation lab maintenance,MCU debug environment (software and hardware) setup,supporting on EMC lab design and creation.
Job Requirements:
1.BS.Degree or above in Electrical Engineering or equivalent.
2.Experience and knowledge of electronics and electrical components.
3.Experience and knowledge of EMC and EMC test is preferred.
4.Experience and knowledge of Cadence Allegro platform,especially the OrCAD system,is preferred.
5.Experience and knowledge of IC custom layout is a big plus.
6.Experience and knowledge of firmware and software design is a big plus.
7.Good communication skills.
8.Team player. |
Title: Custom Layout Engineer(FSQX)
Location: Tianjin |
Job Description:
Perform full custom layout, physical verification and parasitic
extraction for Freescale analog blocks and IO libraries. Generate all the physical views required for the chip level integration.
Job Requirements:
1.BS Degree or above in Electrical Engineering or equivalent.
2.Be familiar with layout-related EDA tools,such as Virtuoso/VirtuosoXL,Assura from Cadence and Calibre DRC/LVS from Mentor Graphic.
3.Knowledge on CMOS fabrication process and device structure.
4.Project experience on custom layout is preferred.
5.Basic knowledge on analog circuit design is a big plus.
6.Good communication skills. |
|
| Tianjin TSPG NPI |
Title: Product Engineer
Location: Tianjin |
Scope of Responsibilities:
·Work with Design, Device, Test, Application, Process and QA Engineers, to evaluated new product and new Wafer Fab and Assembly process
·Perform and coordinate Reliability and Electrical test and Failure verification and Failure Analysis on the products
·Develop, evaluate, and improve manufacturing methods, utilizing knowledge of product design, materials and parts, fabrication processes, tooling and production capabilities, assembly methods and quality control standards. Work flexible hours as required to meet project deadlines and manage department
·Specification Configuration and management
·Administrative product management (iDDCM, Tandem…)
·Build and maintain traceability matrix
·Participate in DFMEA
·Manage characterization and qualification plan definition
·Evaluate test coverage
·Drive product characterization: collect and analyze data from lab and final test
·Perform product qualification: reliability tests, ESD, Latch-up, etc…
·Set up production tools in final test (burn-in, ATE, dash boards…)
·Prepare CAB sessions and PPAP documents
·Manage yield improvement, zero defect plans (PAT, SBL, JVT…) and Production ramp up and sustaining
·CQI investigations (ATE test, lab analysis and FA lab follow up)
·Use problem solving tools: 8D, FTA
Specific Knowledge/Skills:
·BS Degree or above in electronics engineering
·Good command of English both in writing and speaking in a global working environment, CET4
·Strong Analog Electronics competences with power device skills and automotive environment knowledge preferred
·Basic statistical knowledge is a must, while having experience on SPC(Statistic Process Control) is a plus
·Strong synthesis and analysis skills
·Test instrumentation techniques and methodology is a must
·Hard working and diligent, good team work spirit |
|
| Tianjin Manufactory |
Title: Equipment Engineer
Location: Tianjin |
Scope of Responsibilities:
·Regular equipment maintenance and continues improvement
·Keep product line equipment run efficiently
·Analyze and resolve problem with equipment to reach zero defect
·Coordinate with equipment supplier to improve equipment capacity
Specific Knowledge/Skills:
·Bachelor degree or above in Mechanical or Automation related major
·Good command of English both in writing and speaking, CET4
·Hard working and diligent, good team work spirit |
Title: Process Engineer
Location: Tianjin |
Scope of Responsibilities:
·Optimize semiconductor production process and parameter
·Evaluate and improve performance of raw material
·Develop new process and product
Specific Knowledge/Skills:
·Bachelor degree or above in Mechanical, Automation, Material related major
·Good command of English both in writing and speaking, CET4
·Be familiar with mechanic and electronic knowledge, process improvement
·Ability of independent working and innovation
·Hard working and diligent, good team work spirit |
|
| Chengdu Design Center |
Title: Systems & Applications Engineering –DSP
Location: Chengdu |
Scope of Responsibilities:
·Development, testing, documentation and support of DSP applications as a contributing member of the DSP team in Chengdu. There is special emphasis on regional focus (China, Korea, etc) to this support.
·The Generation/Publishing of benchmark results and Application Notes that illustrate the performance available from Freescale Digital Signal Processing (DSP) solutions.
·Provide the first level of support for regional FAEs and AEs involved in DSP design win efforts.
Specific Knowledge/Skills:
·Degree in Computer Science, Electronic/Microprocessor Engineering, or similar discipline.
·Exposure to Microprocessor/DSP embedded software systems and/or embedded applications development.
·Awareness of the 3G wireless market and equipment is an advantage.
·Solid understanding of communication systems, experience in networking technology such as broadband access and CPE would be an advantage. TD-SCDMA experience preferred.
·A strong embedded software and operating system background, demonstrable Linux/RTOS knowledge is an advantage. Experience in Linux kernel-space programming is very desirable.
·Domain knowledge of Communications protocols, Linux Kernel.
·Functional command of Spoken/Written English. |
Title: Systems & Applications Engineering –QUICC Engine™
Location: Chengdu |
Scope of Responsibilities:
·Development, testing, documentation and support of microcode and the associated driver for Freescale PowerQuicc Communication Processor.
·To provide technical support to internal/external customers in microcode, upper level software and application development.
·Able to work with cross functional teams from different regions during the development process.
·To deliver technical training on PowerQuicc Communication Processor processors to internal/external customers.
Specific Knowledge/Skills:
·Degree in Computer Science, Electronic/Microprocessor Engineering, or similar discipline.
·Exposure to Microprocessor/DSP embedded software systems and/or embedded applications development.
·Awareness of the 3G wireless market and equipment is an advantage.
·Solid understanding of communication systems, experience in networking technology such as broadband access and CPE would be an advantage. TD-SCDMA experience preferred.
·A strong embedded software and operating system background, demonstrable Linux/RTOS knowledge is an advantage. Experience in Linux kernel-space programming is very desirable.
·Domain knowledge of Communications protocols, Linux Kernel.
·Functional command of Spoken/Written English.
·Occasional travel to work at customer site is required. |
|
| Beijing Design Center |
Title: ESD Modeling Engineer
Location: Beijing |
Scope of Responsibilities: The individual in this position will support ESD/IO clamp library development and product designers with ESD-robust I/O solutions to meet product specific applications for HBM, MM and CDM specifications. The job will involve support of VerilogA/Spice modeling of new ESD device structures for each new generation of process technology, characterize structures for ESD performance and create device models for spice library. It will also require use of Cadence tool to create schematics and layout for LVS verification of new clamp models. The person must have strong programming skills to automate qualification flow of spice models. Must be a team player to improve understanding of device behavior in different ESD/EOS environments.
Specific Knowledge/Skills:
Ph.D. degree or MS degree in microelectronics. A strong device physics background, working knowledge of semiconductor device fabrication processes, and a background in modeling technique is expected. The ideal candidate will have basic knowledge of device modeling,verilogA and simulation using such tools as SPICE, ICCAP and TCAD. Familiarity with a UNIX environment is a must. Some circuit design experience is desirable. |
Title: Device Engineer
Location: Beijing |
Scope of Responsibilities:
Device Development engineer responsible for device design and simulation, process design and simulation, isolation design and simulation, test mask structure definition and device characterization for next generation Smartmos and/or discrete power devices. This individual will need to be creative, as some of the responsibility of this position is to generate heavily diffferentiated technology versus the competition.
Specific Knowledge/Skills:
Educational and experience background: PhD EE or MS EE. A strong device physics background, working knowledge of semiconductor device fabrication processes is expected. |
Title: Device Modeling Engineer
Location: Beijing |
Scope of Responsibilities:
- Master degree or above in microelectronics or semiconductor
- Good knowledge of BSIM and experience of Spice modeling
- Good skill of device parameter extraction and device model validation
- knowledge of modeling methodology for deep sub-micron device and further
- Better to have the experience of semiconductor device, process or circuit design
- Better to have the knowledge of device measurement methodology and data analysis
- Skill of common EDA tools for circuit design and device simulation.
- Skill of Unix/Linux and programming (Perl, C, etc.)
- Fluent oral and written English. |
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